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"A tamper resistant hardware accelerator for RSA cryptographic applications."

Giacinto Paolo Saggese et al. (2004)

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DOI: 10.1016/J.SYSARC.2004.04.002

access: closed

type: Journal Article

metadata version: 2021-10-14

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Giacinto Paolo Saggese, Luigi Romano, Nicola Mazzocca, Antonino Mazzeo:
A tamper resistant hardware accelerator for RSA cryptographic applications. J. Syst. Archit. 50(12): 711-727 (2004)

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