"Reducing cache and TLB power by exploiting memory region and privilege ..."

Zhen Fang et al. (2013)

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DOI: 10.1016/J.SYSARC.2013.04.002

access: closed

type: Journal Article

metadata version: 2024-08-06

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Zhen Fang, Li Zhao, Xiaowei Jiang, Shih-Lien Lu, Ravi R. Iyer, Tong Li, Seung Eun Lee:
Reducing cache and TLB power by exploiting memory region and privilege level semantics. J. Syst. Archit. 59(6): 279-295 (2013)

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