"A clocking technique for FPGA pipelined designs."

Oswaldo Cadenas, Graham M. Megson (2004)

Details and statistics

DOI: 10.1016/J.SYSARC.2004.04.001

access: closed

type: Journal Article

metadata version: 2020-05-19

a service of  Schloss Dagstuhl - Leibniz Center for Informatics