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"Hardware architecture optimization for high-frequency zeroing and LFNST in ..."

Junxiang Zhang et al. (2024)

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DOI: 10.1007/S11554-024-01470-4

access: closed

type: Journal Article

metadata version: 2024-06-05

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Junxiang Zhang, Qinghua Sheng, Rui Pan, Jiawei Wang, Kuan Qin, Xiaofang Huang, Xiaoyan Niu:
Hardware architecture optimization for high-frequency zeroing and LFNST in H.266/VVC based on FPGA. J. Real Time Image Process. 21(3): 90 (2024)

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