"Codebook hardware implementation on FPGA for background subtraction."

Rafael Rodríguez-Gómez et al. (2015)

> Home

Details and statistics

DOI: 10.1007/S11554-012-0249-6

access: closed

type: Journal Article

metadata version: 2020-06-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jrtip/Rodriguez-Gomez15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jrtip/Rodriguez-Gomez15
Rafael Rodríguez-Gómez, Enrique J. Fernandez-Sanchez, Javier Díaz, Eduardo Ros Vidal:
Codebook hardware implementation on FPGA for background subtraction. J. Real Time Image Process. 10(1): 43-57 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.