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"An Alternate Approach to Buffer Insertion for Delay and Power Reduction in ..."

Sandeep Saini et al. (2010)

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DOI: 10.1166/JOLPE.2010.1090

access: closed

type: Journal Article

metadata version: 2021-10-14

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Sandeep Saini, A. Mahesh Kumar, Sreehari Veeramachaneni, M. B. Srinivas:
An Alternate Approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects. J. Low Power Electron. 6(3): 429-435 (2010)

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