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"Power-speed Trade-off in Parallel Prefix Circuits."

Sirirut Vanichayobon et al. (2005)

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DOI: 10.1142/S0218126605002179

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - https://dblp.org/rec/journals/jcsc/VanichayobonDLA05
Sirirut Vanichayobon, Sudarshan K. Dhall, Sivaramakrishnan Lakshmivarahan, John K. Antonio:
Power-speed Trade-off in Parallel Prefix Circuits. J. Circuits Syst. Comput. 14(1): 65-98 (2005)

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