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"Designing of Low-Power High-Speed Noise Immune CNTFET 1-Trit Unbalanced ..."

Yogesh Shrivastava, Tarun Kumar Gupta (2022)

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DOI: 10.1142/S0218126622500827

access: closed

type: Journal Article

metadata version: 2022-05-18

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  - journals/jcsc/ShrivastavaG22
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  - https://dblp.org/rec/journals/jcsc/ShrivastavaG22
Yogesh Shrivastava, Tarun Kumar Gupta:
Designing of Low-Power High-Speed Noise Immune CNTFET 1-Trit Unbalanced Ternary Subtractor. J. Circuits Syst. Comput. 31(5): 2250082:1-2250082:16 (2022)

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