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"Novel Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2D ..."

Goran Savic, Vladimir M. Rajovic (2019)

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DOI: 10.1142/S0218126619501184

access: closed

type: Journal Article

metadata version: 2024-05-07

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Goran Savic, Vladimir M. Rajovic:
Novel Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2D Inverse DWT. J. Circuits Syst. Comput. 28(7): 1950118:1-1950118:33 (2019)

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