"FPGA Implementation of Optimized QPSK and OQPSK Using VHDL."

Raja Muthalagu, Rahul Sudheer, Seyed Ibrahim (2018)

> Home

Details and statistics

DOI: 10.12720/JCM.13.4.182-186

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jcm/MuthalaguSI18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jcm/MuthalaguSI18
Raja Muthalagu, Rahul Sudheer, Seyed Ibrahim:
FPGA Implementation of Optimized QPSK and OQPSK Using VHDL. J. Commun. 13(4): 182-186 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.