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"Circuit design of a dual-versioning L1 data cache."
Azam Seyedi et al. (2012)
- Azam Seyedi, Adrià Armejach
, Adrián Cristal
, Osman S. Unsal
, Ibrahim Hur, Mateo Valero
:
Circuit design of a dual-versioning L1 data cache. Integr. 45(3): 237-245 (2012)
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