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"Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm ..."

David del Rio et al. (2016)

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DOI: 10.1016/J.VLSI.2015.07.010

access: closed

type: Journal Article

metadata version: 2020-02-20

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David del Rio, Iñaki Gurutzeaga, Héctor Solar, Andoni Beriain, Roc Berenguer:
Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology. Integr. 52: 208-216 (2016)

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