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"A hardware accelerator for hierarchical VLSI routing."

C. P. Ravikumar, Sarma Sastry (1989)

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DOI: 10.1016/0167-9260(89)90006-0

access: closed

type: Journal Article

metadata version: 2020-02-20

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C. P. Ravikumar, Sarma Sastry:
A hardware accelerator for hierarchical VLSI routing. Integr. 7(3): 283-302 (1989)

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