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"Automated Debugging of Verilog Designs."

Bernhard Peischl, Naveed Riaz, Franz Wotawa (2012)

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DOI: 10.1142/S0218194012500209

access: closed

type: Journal Article

metadata version: 2020-07-22

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  - https://dblp.org/rec/journals/ijseke/PeischlRW12
Bernhard Peischl, Naveed Riaz, Franz Wotawa:
Automated Debugging of Verilog Designs. Int. J. Softw. Eng. Knowl. Eng. 22(5): 695- (2012)

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