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"Hardware Transactional Memory Exploration in Coherence-Free Many-Core ..."

Dimitra Papagiannopoulou et al. (2018)

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DOI: 10.1007/S10766-018-0569-7

access: closed

type: Journal Article

metadata version: 2020-04-01

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  - https://dblp.org/rec/journals/ijpp/Papagiannopoulou18
Dimitra Papagiannopoulou, Andrea Marongiu, Tali Moreshet, Luca Benini, Maurice Herlihy, R. Iris Bahar:
Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures. Int. J. Parallel Program. 46(6): 1304-1328 (2018)

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