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"FPGA Based High Performance Double-Precision Matrix Multiplication."

Vinay B. Y. Kumar et al. (2010)

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DOI: 10.1007/S10766-010-0131-8

access: closed

type: Journal Article

metadata version: 2020-12-29

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  - https://dblp.org/rec/journals/ijpp/KumarJPN10
Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan:
FPGA Based High Performance Double-Precision Matrix Multiplication. Int. J. Parallel Program. 38(3-4): 322-338 (2010)

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