"Wireless Extension Mechanism and Logic Design for FPGA-based Ethernet ..."

Kailong Zhang et al. (2017)

> Home

Details and statistics

DOI: 10.2991/IJNDC.2017.5.1.2

access: open

type: Journal Article

metadata version: 2020-05-18

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ijndc/ZhangZHWM17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijndc/ZhangZHWM17
Kailong Zhang, Panfei Zuo, Liang Hu, Xiao Wu, Kejian Miao:
Wireless Extension Mechanism and Logic Design for FPGA-based Ethernet Powerlink Node. Int. J. Networked Distributed Comput. 5(1): 12-21 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.