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"LUT-DSP usage trade-off for re-configurable convolution acceleration core ..."

Botao Xiong et al. (2024)

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DOI: 10.1002/CTA.3834

access: closed

type: Journal Article

metadata version: 2024-06-18

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Botao Xiong, Sheng Fan, Xintong He, Zezhao Zhou, Runhua Yang, Sicun Li, Rensheng Shen, Yuchun Chang:
LUT-DSP usage trade-off for re-configurable convolution acceleration core based on small logarithmic floating point representation. Int. J. Circuit Theory Appl. 52(4): 1864-1871 (2024)

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