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ORCID"Design and FPGA Implementation of a Universal Chaotic Signal Generator ..."
Mo Qiu et al. (2017)
- Mo Qiu, Simin Yu, Yuqiong Wen, Jinhu Lü
, Jianbin He, Zhuosheng Lin:
Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control. Int. J. Bifurc. Chaos 27(3): 1750040:1-1750040:15 (2017)
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