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"Hardware architectures for the H.265/HEVC discrete cosine transform."

Grzegorz Pastuszak (2015)

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DOI: 10.1049/IET-IPR.2014.0277

access: closed

type: Journal Article

metadata version: 2020-06-18

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  - https://dblp.org/rec/journals/iet-ipr/Pastuszak15
Grzegorz Pastuszak:
Hardware architectures for the H.265/HEVC discrete cosine transform. IET Image Process. 9(6): 468-477 (2015)

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