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"Scheduling configuration memory error checks to improve the reliability of ..."

Nguyen Tran Huu Nguyen, Ediz Cetin, Oliver Diessel (2019)

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DOI: 10.1049/IET-CDT.2018.5001

access: closed

type: Journal Article

metadata version: 2020-12-31

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Nguyen Tran Huu Nguyen, Ediz Cetin, Oliver Diessel:
Scheduling configuration memory error checks to improve the reliability of FPGA-based systems. IET Comput. Digit. Tech. 13(3): 154-165 (2019)

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