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"Design of on-chip error correction systems for multilevel NOR and NAND ..."

Fei Sun et al. (2007)

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DOI: 10.1049/IET-CDS:20060275

access: closed

type: Journal Article

metadata version: 2020-09-10

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Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Zhang:
Design of on-chip error correction systems for multilevel NOR and NAND flash memories. IET Circuits Devices Syst. 1(3): 241-249 (2007)

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