"Scaling considerations for sub-90 nm split-gate flash."

Samar K. Saha (2008)

> Home

Details and statistics

DOI: 10.1049/IET-CDS:20070126

access: closed

type: Journal Article

metadata version: 2020-09-10

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/iet-cds/Saha08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-cds/Saha08
Samar K. Saha:
Scaling considerations for sub-90 nm split-gate flash. IET Circuits Devices Syst. 2(1): 144-150 (2008)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.