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ORCID"Efficient FPGA based architecture for high-order FIR filtering using ..."
Mountassar Maamoun et al. (2021)
- Mountassar Maamoun
, Adnane Hassani, Samir Dahmani, Hocine Ait Saadi, Ghania Zerari, Noureddine Chabini, Rachid Beguenane:
Efficient FPGA based architecture for high-order FIR filtering using simultaneous DSP and LUT reduced utilization. IET Circuits Devices Syst. 15(5): 475-484 (2021)
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