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"Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits."

Kumpei Yoshikawa et al. (2012)

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DOI: 10.1587/TRANSFUN.E95.A.2284

access: closed

type: Journal Article

metadata version: 2020-04-11

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  dblp key:
  - journals/ieicet/YoshikawaSISN12
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/YoshikawaSISN12
Kumpei Yoshikawa, Yuta Sasaki, Kouji Ichikawa, Yoshiyuki Saito, Makoto Nagata:
Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(12): 2284-2291 (2012)

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