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"Reducing Interconnect Complexity for Efficient Path Metric Memory ..."

Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu (2008)

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DOI: 10.1093/IETISY/E91-D.9.2300

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/ShiehWW08
Ming-Der Shieh, Tai-Ping Wang, Chien-Ming Wu:
Reducing Interconnect Complexity for Efficient Path Metric Memory Management in Viterbi Decoders. IEICE Trans. Inf. Syst. 91-D(9): 2300-2311 (2008)

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