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"A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free ..."
Junichi Miyakoshi et al. (2006)
- Junichi Miyakoshi, Yuichiro Murachi, Tomokazu Ishihara, Hiroshi Kawaguchi
, Masahiko Yoshimoto:
A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free and Horizontal/Vertical Accessibility for Super-Parallel Video Processing. IEICE Trans. Electron. 89-C(11): 1629-1636 (2006)
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