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"A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation."

Junichi Miyakoshi et al. (2005)

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DOI: 10.1093/IETELE/E88-C.4.559

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/MiyakoshiMHMMY05
Junichi Miyakoshi, Yuichiro Murachi, Koji Hamano, Tetsuro Matsuno, Masayuki Miyama, Masahiko Yoshimoto:
A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation. IEICE Trans. Electron. 88-C(4): 559-569 (2005)

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