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"Clock Period Minimization Method of Semi-Synchronous Circuits by Delay ..."

Yukihide Kohira, Atsushi Takahashi (2005)

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DOI: 10.1093/IETFEC/E88-A.4.892

access: closed

type: Journal Article

metadata version: 2023-05-01

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Yukihide Kohira, Atsushi Takahashi:
Clock Period Minimization Method of Semi-Synchronous Circuits by Delay Insertion. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(4): 892-898 (2005)

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