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"An Analysis for Fault-Tolerant 3D Processor Arrays Using 1.5-Track Switches."

Tadayoshi Horita, Yuuji Katou, Itsuo Takanami (2008)

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DOI: 10.1093/IETFEC/E91-A.2.623

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - https://dblp.org/rec/journals/ieicet/HoritaKT08
Tadayoshi Horita, Yuuji Katou, Itsuo Takanami:
An Analysis for Fault-Tolerant 3D Processor Arrays Using 1.5-Track Switches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(2): 623-632 (2008)

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