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"High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2: 1 ..."

Yutaka Arayashiki et al. (2013)

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DOI: 10.1587/TRANSELE.E96.C.912

access: closed

type: Journal Article

metadata version: 2020-04-11

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  dblp key:
  - journals/ieicet/ArayashikiKOMAM13
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/ArayashikiKOMAM13
Yutaka Arayashiki, Takashi Kamizono, Yukio Ohkubo, Taisuke Matsumoto, Yoshiaki Amano, Yutaka Matsuoka:
High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2: 1 Multiplexer and 1: 2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors. IEICE Trans. Electron. 96-C(6): 912-919 (2013)

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