"6.25-10Gb/s adaptive CTLE with spectrum balancing and loop-unrolled ..."

Haoran Sun, Yinhang Zhang, Xi Yang (2022)

> Home

Details and statistics

DOI: 10.1587/ELEX.19.20220429

access: open

type: Journal Article

metadata version: 2023-02-15

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/ieiceee/SunZY22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceee/SunZY22
Haoran Sun, Yinhang Zhang, Xi Yang:
6.25-10Gb/s adaptive CTLE with spectrum balancing and loop-unrolled half-rate DFE in TSMC 0.18µm CMOS. IEICE Electron. Express 19(22): 20220429 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.