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"Recovery Time and Fault Tolerance Improvement for Circuits mapped on ..."

Anees Ullah, Luca Sterpone (2014)

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DOI: 10.1007/S10836-014-5463-7

access: closed

type: Journal Article

metadata version: 2020-09-11

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Anees Ullah, Luca Sterpone:
Recovery Time and Fault Tolerance Improvement for Circuits mapped on SRAM-based FPGAs. J. Electron. Test. 30(4): 425-442 (2014)

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