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"A Fault Tolerant Hierarchical Network on Chip Router Architecture."

Mohammad Hossein Neishaburi, Zeljko Zilic (2013)

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DOI: 10.1007/S10836-013-5398-4

access: closed

type: Journal Article

metadata version: 2020-09-11

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  - https://dblp.org/rec/journals/et/NeishaburiZ13
Mohammad Hossein Neishaburi, Zeljko Zilic:
A Fault Tolerant Hierarchical Network on Chip Router Architecture. J. Electron. Test. 29(4): 485-497 (2013)

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