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"CMOS-4 Back-end Process Development for a VLSI 0.75 µm Triple-level ..."

Marion M. Garver et al. (1992)

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DOI: —

access: open

type: Journal Article

metadata version: 2023-01-23

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  dblp key:
  - journals/dtj/GarverBCDRW92
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  persistent URL:
  - https://dblp.org/rec/journals/dtj/GarverBCDRW92
Marion M. Garver, Joseph M. Bulger, Thomas E. Clark, Jamshed H. Dubash, Lorain M. Ross, Daniel J. Welch:
CMOS-4 Back-end Process Development for a VLSI 0.75 µm Triple-level Interconnection Technology. Digit. Tech. J. 4(2): 51-72 (1992)

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