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"Architecture of a Reusable BIST Engine for Detection and Autocorrection of ..."
Bruce Querbach et al. (2016)
- Bruce Querbach, Rahul Khanna, Sudeep Puligundla, David Blankenbeckler, Joseph Crop, Patrick Yin Chiang:
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC. IEEE Des. Test 33(1): 59-67 (2016)
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