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"Performance Analysis of a Modified MAP Decoder Architecture for Low Power ..."

S. Shiyamala, V. Rajamani (2015)

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DOI: 10.1007/S00034-015-0045-1

access: closed

type: Journal Article

metadata version: 2020-06-21

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  - https://dblp.org/rec/journals/cssp/ShiyamalaR15
S. Shiyamala, V. Rajamani:
Performance Analysis of a Modified MAP Decoder Architecture for Low Power Dissipation. Circuits Syst. Signal Process. 34(12): 3949-3964 (2015)

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