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"Speed-Area Optimized VLSI Architecture of Hexagonal Search Algorithm for ..."
Rohan Mukherjee et al. (2017)
- Rohan Mukherjee, Baishik Biswas, Indrajit Chakrabarti, Pranab Kumar Dutta, Somnath Sengupta, Ajoy Kumar Ray:
Speed-Area Optimized VLSI Architecture of Hexagonal Search Algorithm for Motion Estimation of (512×512) Frames. Circuits Syst. Signal Process. 36(2): 640-657 (2017)
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