"Shift Register, Reconvergent-Fanout (SiRF) PUF Implementation on an FPGA."

Jim Plusquellic (2022)

> Home

Details and statistics

DOI: 10.3390/CRYPTOGRAPHY6040059

access: open

type: Journal Article

metadata version: 2023-01-15

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/cryptography/Plusquellic22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/cryptography/Plusquellic22
Jim Plusquellic:
Shift Register, Reconvergent-Fanout (SiRF) PUF Implementation on an FPGA. Cryptogr. 6(4): 59 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.