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"An Irredundant and Compressed Data Layout to Optimize Bandwidth ..."

Corentin Ferry et al. (2024)

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DOI: 10.48550/ARXIV.2401.12071

access: open

type: Informal or Other Publication

metadata version: 2024-02-05

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  - journals/corr/abs-2401-12071
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  - https://dblp.org/rec/journals/corr/abs-2401-12071
Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay V. Rajopadhye:
An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators. CoRR abs/2401.12071 (2024)

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