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"Functional delay test generation approach using a software prototype of ..."

Eduardas Bareisa et al. (2013)

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DOI: 10.2298/CSIS120416019B

access: open

type: Journal Article

metadata version: 2023-03-21

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  - journals/comsis/BareisaJMS13
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  - https://dblp.org/rec/journals/comsis/BareisaJMS13
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejunas, Rimantas Seinauskas:
Functional delay test generation approach using a software prototype of the circuit. Comput. Sci. Inf. Syst. 10(3): 1165-1184 (2013)

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