"Loop profiling tool for HPC code inspection as an efficient method of FPGA ..."

Marcin Pietron, Pawel Russek, Kazimierz Wiatr (2010)

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DOI: 10.2478/V10006-010-0043-1

access: open

type: Journal Article

metadata version: 2020-03-11

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Marcin Pietron, Pawel Russek, Kazimierz Wiatr:
Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration. Int. J. Appl. Math. Comput. Sci. 20(3): 581-589 (2010)

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