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"A Fully Integrated System-on-Chip Design with Scalable Resistive ..."

Fuxi Cai et al. (2022)

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DOI: 10.1002/AISY.202200014

access: open

type: Journal Article

metadata version: 2022-10-07

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  - journals/aisy/CaiYUTLFZLKHA22
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  - https://dblp.org/rec/journals/aisy/CaiYUTLFZLKHA22
Fuxi Cai, She-Hwa Yen, Apurva Uppala, Luke Thomas, Tianchi Liu, Peter Fu, Xiaofeng Zhang, Ambrose Low, Deepak Kamalanathan, Joe Hsu, Buvna Ayyagari-Sangamalli:
A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing. Adv. Intell. Syst. 4(8) (2022)

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