"Embedded Hardware-Efficient FPGA Architecture for SVM Learning and Inference."

B. B. Shabarinath, Muralidhar Pullakandam (2025)

> Home

Details and statistics

DOI: 10.1109/ACCESS.2025.3562453

access: open

type: Journal Article

metadata version: 2025-05-09

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/access/ShabarinathP25
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/access/ShabarinathP25
B. B. Shabarinath, Muralidhar Pullakandam:
Embedded Hardware-Efficient FPGA Architecture for SVM Learning and Inference. IEEE Access 13: 68930-68947 (2025)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.