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"1.5 Gbit/s FPGA Implementation of a Fully-Parallel Turbo Decoder Designed ..."

An Li et al. (2016)

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DOI: 10.1109/ACCESS.2016.2599408

access: open

type: Journal Article

metadata version: 2019-06-02

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An Li, Peter Hailes, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo:
1.5 Gbit/s FPGA Implementation of a Fully-Parallel Turbo Decoder Designed for Mission-Critical Machine-Type Communication Applications. IEEE Access 4: 5452-5473 (2016)

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