"A Low Power Memory-Integrated Hardware BNN-MLP Model on an FPGA for ..."

Geon-Hoe Kim et al. (2025)

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DOI: 10.1109/ACCESS.2025.3572201

access: open

type: Journal Article

metadata version: 2025-06-10

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Geon-Hoe Kim, Dong-Gyun Kim, Sung-Jae Lee, Jong-Han Kim, Da-Yeong Ann, Hyejin Kim, YoungGun Pu, HeeJeong Jasmine Lee, Jun-Eun Park, Kang-Yoon Lee:
A Low Power Memory-Integrated Hardware BNN-MLP Model on an FPGA for Current Signals in a Biosensor. IEEE Access 13: 90741-90752 (2025)

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