"A 65-nm CMOS 1 GS/s 45 mW Hybrid Digital-to-Analog Converter (DAC) With ..."

Norhamizah Idros et al. (2024)

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DOI: 10.1109/ACCESS.2024.3486069

access: open

type: Journal Article

metadata version: 2024-12-10

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Norhamizah Idros, Jagadheswaran Rajendran, Selvakumar Mariappan, Yizhi Li, Shengquan Wang, Nuha Rhaffor, Narendra Kumar, Abdullah Mohammed Alghaihab, Arokia Nathan, Binboga Siddik Yarman:
A 65-nm CMOS 1 GS/s 45 mW Hybrid Digital-to-Analog Converter (DAC) With Digital Deglitch Mechanism Achieving 13.83 fJ/step FOM for 5G New Radio Sub-6 GHz Applications. IEEE Access 12: 170596-170609 (2024)

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