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"Detection of false paths in logical circuits by joint analysis of the ..."
Anzhela Yu. Matrosova, Sergey A. Ostanin, Virendra Singh (2013)
- Anzhela Yu. Matrosova, Sergey A. Ostanin, Virendra Singh:
Detection of false paths in logical circuits by joint analysis of the AND/OR trees and SSBDD-graphs. Autom. Remote. Control. 74(7): 1164-1177 (2013)
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