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"Power Reduction of Asynchronous Logic Circuits Using Activity Detection."

Yvain Thonnart et al. (2009)

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DOI: 10.1109/TVLSI.2008.2011912

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/ThonnartBVV09
Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet:
Power Reduction of Asynchronous Logic Circuits Using Activity Detection. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 893-906 (2009)

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