"A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs."

Si-Nai Kim et al. (2018)

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DOI: 10.1109/TCSII.2018.2809965

access: closed

type: Journal Article

metadata version: 2020-05-27

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Si-Nai Kim, Woo-Cheol Kim, Min-Jae Seo, Seung-Tak Ryu:
A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(9): 1154-1158 (2018)

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